Digital Electronics

# Analogue to Digital Conversion in Digital Electronics

## Analogue to Digital Conversion

Analogue to digital conversion is a process, by means of which an analogue quantity can be converted into digital form. In other words, a process through which analogue input voltage can be converted to multiple equivalent digital output levels, is know as A/D conversion. An encoder is used for the purpose of analogue to digital conversion (conversion of analogue values to equivalent digital values), which is also known as A/D converter. Remember that process of A/D conversion is slightly complicated as compared to D/A conversion. The following different methods are used for analogue to digital conversion;

1). Digital – ramp method

2). Counter method

3). Simultaneous method

4). Continuous conversion method

5). Successive approximation method

6). Single slop and dual slop methods

7). Flash method

8). Tracking method

## Analogue to Digital Converter

A device which converts analogue values to equivalent digital values is known as analogue to digital (A/D) converter or encoder. The basic diagram of an A/D converter has been illustrated in figure 10.14. The analogue input of this converter is in the form of a single variable voltage and its value is keeps changing between 0 volts to 3 volts. Whereas output of this converter is in binary shape. This A/D converter translates or converts analogue voltage existing on its input to 4 – bit binary words. This operation of A/D converter has been illustrated via a truth table shown in figure 10.15, according to which when value of analogue input is zero volt (0V) as has been indicated through row number 3 of the table, in such a situation this converter’s output is binary 0000.

Figure 10.14 – Block diagram of an A/D converter

When input value is 0.2V, in such a situation its output value is 0001 as has been illustrated via row number 2 of the table.

Figure 10.15 – Truth table for A/D converter

 Analogue Input Binary Output 8s 4s 2s 1s Volts D C B A Row 1 0.0 0 0 0 0 Row 2 0.2 0 0 0 1 Row 3 0.4 0 0 1 0 Row 4 0.6 0 0 1 1 Row 5 0.8 0 1 0 0 Row 6 1.0 0 1 0 1 Row 7 1.2 0 1 1 0 Row 8 1.4 0 1 1 1 Row 9 1.6 1 0 0 0 Row 10 1.8 1 0 0 1 Row 11 2.0 1 0 1 0 Row 12 2.2 1 0 1 1 Row 13 2.4 1 1 0 0 Row 14 2.6 1 1 0 1 Row 15 2.8 1 1 1 0 Row 16 3.0 1 1 1 1

When the value of analogue voltage being applied on A/D converter’s input is 0.4V, binary 0010 is obtained from the output of that converter, as has been illustrated vide row number 3 of the truth table.

It is obviously clear from the table that every time an addition of 0.2V is made in input, an addition of binary 1 occurs in binary count received on output. The last line of the table i.e. row number 16 denotes that when maximum 3V are provided on this converter’s input, output becomes binary 1111. It should be inculcated that truth tables of A/D converter and D/A converter are absolutely reversed to each other (i.e. inputs of A/D converter are outputs for D/A converter and outputs of A/D converter are inputs for D/A converter as has been illustrated via truth tables given in figure 10.15 10.8).

The truth table for analogue to digital (A/D) converter seems quite simple, however, electronic circuit existing on the converter, which performs the function of conversion, is somewhat complicated. In diagram 10.16, a type of A/D converter (i.e. ramp or digital ramp or staircase ramp A/D converter) has been illustrated. As the figure suggests, this converter consists of a voltage comparator, an AND gate, a binary counter and a digital to analogue converter (D/A).

Figure 10.16 – Block diagram of a counter – ramp type A/D converter

According to figure 10.16, analogue input voltages (0 to 3 volts) are applied on comparator from left end (i.e. from point A). comparator receives voltages coming from digital to analogue (D/A) converter located on the right side, on point B and makes its comparison with analogue input voltages received on point A and checks which of these two voltages are high. If analogue input voltages received on comparator’s input A exceed as compared to voltages on its input B, clock existing on circuit has a permission to add 4 bits in counter’s count. However, in case the situation is reversed (i.e. if voltage value received on comparator’s B input exceeds as compared to the voltage value received on input A), clock present on the circuit has no permission to make any addition in counter’s count  (in other words, if comparator’s A input voltage are higher than comparator’s B input voltage, comparator provides logical 1 output, which means that counters’ clock has liberty to make an addition in BCD counter’s count. And if comparator’s B input voltage are higher than its A input voltage, comparator’s output is logical 0, which means that it does not allow clock to count further). Remember addition in counter’s count takes place until feedback received from D/A converter exceeds analogue input voltage. However, when feedback voltages are higher than analogue input voltage, at that moment comparator (heart of which tends to be an operational amplifier) stops counter from moving towards a higher count. According to the table 10.15, suppose that value of input analogue voltage is 2V, then under such a condition, binary counter stops after a counting up to 1010 (i.e. counter counts till 1010 before being stopped). After counter stops, it resets on binary 0000 and starts a re- count up to 1010. Further explanation of an A/D converter’s operational mechanism, as has been illustrated in the diagram, is as follows;

Suppose that logical state 1 exists on comparator’s output X (which is input for AND gate) and counter is on binary 0000. In such a situation, if 0.55V are provided on converter’s analogue input, as a result of X point being on a logic state 1, AND gate becomes enabled or it operates (remember that when both inputs of an AND gate are simultaneously high, only at that time its output is high) and first pulse received from clock appears on BCD counter’ clock input. Thus, counter adds it count up to binary 0001 (i.e. an addition of 1 occurs in counters’ count as a result of receiving first clock pulse) which can be assessed by means of irradiated lights towards the right on top of the diagram. If the diagram is keenly observed, it also becomes evident that 0001 binary being displayed by means of lights, is also received on D/A converter set on bottom part of the diagram.

We know that according to the table shown vide figure 10.8, 0.2V are produced on D/A converter’s output. as a result of binary 0001. These 0.2V feedback on comparator’s B input. Comparator makes a comparison between its both inputs (i.e. 0.2V & 0.55V). As it’s A input (i.e. 0.55V) is higher than its B input (i.e. 0.2V), therefore comparator’s output remains on logical state 1. Comparator’ this logical 1 or high output is received on AND gate, as a result of which, this gate enables (or starts operating). As a result, next (or second) clock pulse is received on counter after passing through AND gate and counter makes an addition of 1 into its count. Thus, count becomes 0010 on counter (i.e. counters’ count increases from 0001 to 0010 as a result of addition of 1 in count). Remember that 0010 count is also transmitted on D/A converter.

According to the table (diagram 10.8) 0.4V are produced from D/A converter’s output by means of 0010 input. These 0.4V are feedback on comparator B’s input.  Comparator then makes a comparison of B input with A input. As A input (0.55V) is still high as compared to B input (0.4V), therefore comparator’s output sustains on logical state 1, as a result, AND gate enables. As AND gate operates, next (i.e. third) clock pulse reaches the counter through clock. As such, counter’s count adds up to 0011. This count consisting of 0011 digits, is feedback on D/A converter.

According to truth table (10.8), D/A converter generates 0.6V output from 0011 input. These 0.6V are transmitted on comparator’s B input. Comparator then makes a comparison of its input A with that to input B. Now for the first time, input B becomes higher as compared to input A, as a result comparator’ output becomes logical 0. This logical 0 state of comparator output, tends to be input of AND gate, through which AND gate disables (i.e. it does not work, because if any one of both inputs of an AND gate is low, its output also becomes low). As such clock pulses being transmitted from clock, fail to reach counter and counter stops its count on binary 0011 (or counter stops on binary 0011). Binary 0011 must essentially be equivalent to 0.55V. It must be inculcated that if we see line number 4 of the table (figure 10.15), we come to know that practically answer of 0.6V tends to be binary 0011, thus it can be said that A/D converter operates just in accordance with this truth table.

If analogue input voltages are 1.2V, then according to the truth table (figure 10.15 binary output will be 0110 (see line 7 of the table). In such a situation, counter before being paused by comparator, will count from binary 0000 to binary 0110. Similarly, if analogue input voltages are 2.8V, binary output will be 1110. In such a situation, counter will count from binary 0000 to binary 1110 and then comparator will stop it from further count. It must be inculcated that conversion of analogue voltage to binary output requires some time, however in majority of cases, clock drives so swiftly that issue of time lag does not arise and the conversion process takes place quite speedily. As a D/A converter also exists on a counter ramp type A/D converter circuit as illustrated by diagram 10.16, therefore it is incumbent to have some knowledge about D/A converter in order to understand circuit’s operation in a better way. This is the reason, process of D/A converter is inculcated first prior to understanding the mechanism of an A/D converter. Term ramp has been used in the name of this converter.

The term ramp has been used in this converter’s name, which means that voltages which are received back / feedback on comparator from D/A converter, a gradual increase occurs in it (in the example mentioned above, first they became 0.2V, then 0.4V and then 0.6V). And if we represent this gradual increase in voltages being fed back on comparator’s B input in the shape of a graph, it will resemble a ramp or saw tooth waveform (which is triangular shaped wave) as has been illustrated by figure 10.17. In this figure, 3V have been provided on A/D converter’s analogue input voltage. Ramp voltages tend to increase; however, its value remains less as compared to the voltage value of comparator A’s input. In this situation, comparator A’s output is logical 1, as a result of which AND gate remains enabled and clock pulses keep passing through it. It is clear from the figure that as a result of a higher ramp voltage as compared to input voltage three clock pulses pass through the first AND gate. Comparator’s output on point Y is logical 0 and, AND gate becomes disabled. As soon as AND gate closes, counter stops count on binary 0011. As such, binary 0011 means that 3V have been applied on input.

Figure 10.17 – Ramp – type A/D converter wave forms with 3V applied

Sometimes ramp A/D converter is used instead of counter ramp A/D converter, which operates nearly similarly to counter ramp A/D converter, except that instead of providing feedback (ramp) voltage on comparator B’s input, voltages are provided by means of a ramp generator. This has been illustrated in figure 10.18.  Remember that ramp generator produces voltages in saw tooth waveform shape.

Figure 10.18 – Block diagram of a ramp – type A/D converter

## Successive Approximation A/ D Converter

The conversion time of a ramp type A/D converter (time which is required for the conversion of analogue input voltage received on a converter’s IC to binary data on its output, is called conversion time) is high and this time increases with an increase in voltages. Therefore, as a consequence of this drawback, a different type of A/D converter is used instead of a ramp type A/D converter, the conversion time of which is extremely low (i.e. its speed is quite fast). As such, A/D converter, the conversion time of which is relatively less and which is probably most widely used, is called successive approximation A/D converter. Remember, conversion time of this type of converter is fixed or same for any value of an analogue input.

Block diagram of a successive approximation type A/D converter has been illustrated in diagram 10.19. This converter consists of a voltage comparator, a D/A converter and a new logic block (which is called successive approximation block or successive approximation register SAR). The working mechanism of this type of converter is as follows;

Figure 10.19 – Block diagram of a successive approximation type A/D converter

Suppose that we apply 7V on comparator’s analogue input A. In such a situation, successive approximation A/D converter first guess about how many voltages analogue input has. This approximation is done by means of setting MSB (most significant bit) (i.e. 8s) on 1 and this function is carried out by successive approximation logic unit. This has been illustrated from block 1 for operational flow chart of the converter’s circuit. The outcome (1000) which is obtained from the logic unit, is fed back on comparator via D/A converter. Comparator answers the question given on block 2 of the figure (whether value of binary 1000 is high or low as compared to these input voltages). In such a situation, answer is high. Thus, successive approximation logic carries out operation given on block 3, according to which 0 emerges on place of 8s (or binary output D), whereas 1 set on 4s (or binary output C).

Figure 10.20 – Flow charting the operation of the successive approximation type A/D

Thus, the received outcome (0100) is transmitted on comparator via D/A converter. Comparator then answers the question in block 4 whether binary 0100 is high or low as compared to the values of these input voltages.

Then successive approximation logic performs operation given on block 5 (i.e. 2s where there was previously 0, sets on 1). As such, 0110 result is received, which is fed back on comparator. Then comparator answers the question given on block 6 (whether binary 0110 is high or low as compared to these input voltages) that this value is low. After this, successive approximation logic performs task given on block 7 (that 1 is also set on 1s place). As such, final result is obtained in the form of binary 0111, which is equivalent to 7V provided on A/D converter’s input.

It must be inculcated that all items given in blocks (figure 10.20) are performed through successive approximation unit. Answers to questions are received by means of comparator. Further, it should also be remembered that tasks carried out with the help of successive approximation logic depends whether answers to the asked questions is high or low (see block number 3 & 5). An advantage of successive approximation A/D converter is that very few guesses are needed in order to reach the answers and it is extremely fast with respect to its operation. That’s why this converter is quite widely used. An example of successive approximation analogue to digital converter (ADC) is ADC0804 number IC, pin program diagram and detail of which has been illustrated in figure 10.21. This device operates with a +5V supply and its conversion time is 10µs.

Figure 10.21 (a)