Introduction of Field-Effect Transistors
A field-effect transistor (briefly called FET) is a unipolar semiconductor device that like a bipolar junction transistor, consists of three terminals (like vacuum tubes), in which current is controlled through an electric field. In other words, the main current (between source and drain) of the FET(Field Effect Transistor) is controlled through the electric field effect caused as a result of voltages supplied between source and gate. That’s why it is called field effect.
The basic difference between a transistor and a vacuum tube is that a transistor is controlled via current, whereas a vacuum tube is controlled through voltage. Apart from the field-effect transistors, the rest of the transistors are current amplifiers. This particular component is a voltage control amplifier. Terminals of an ordinary transistor are known as emitter, base, and collector while three terminals of a field-effect transistor are known as source, gate, and drain respectively. Voltages are supplied on the gate of the field-effect transistor. Through changing gate voltages, the charge is provided via changing resistance found between source and drain. Gate input resistance of FET(Field Effect Transistor) is very high, therefore, a very low current passes through its gate.
Remember, the operation of a FET(Field Effect Transistor) depends on the movement of only one charge carrier (holes or electrons), due to which are called unipolar junction transistors (UJTs). Whereas operation of bipolar junction transistors (BJTs) depends on the movement of both charge carriers (i.e. holes and electrons).
Following terms regarding a “FET(Field Effect Transistor)” should be indoctrinated in mind.
It is a terminal, through which the majority of carriers pass. In other words, it is a terminal, through which charge carriers penetrate into the channel bar. It resembles a BJT emitter.
It is a terminal through which the majority of carriers emit. Drain to source voltage (VDS) operates drain current (ID). In other words, it is such a terminal by means of which current passes out from the channel. This FET terminal resembles a BJT collector.
It is a control terminal of a FET(Field Effect Transistor) which generates an electric field. Through variations in it, the conductivity of a channel can be modulated. In other words, it is an electrode, which controls channel conductance found between a source and drain. Gate are two mutually interconnected heavy doped regions, which form two P-N junctions. Gate source voltage (VGS) reverses the bias of a gate. Input signal voltage is supplied on the gate. This terminal junction resembles a junction transistor’s base.
It is a vacant space between two gates through which the majority of carriers pass from source to drain (supplying VDS voltages from drain to source) or the conductive path of a semiconductor found between source and a drain, which is called a channel.
Construction and Working of FET:
In figure 5.1, the construction of FET(Field Effect Transistor) and its symbols have been portrayed. From a construction point of view, these are N or P channels, as is evident from symbols. An N-type material is diffused into a P-type insulating semiconductor area or substrate, due to which a relatively narrow channel is formed. Afterward, a gate of P material forms between the source and drain. The construction of a FET depends on the majority of carriers. According to the diagram, electrons act as a majority carrier between source and drain, current thus has been shown via an arrow sign in diagram 5.2
We know that when the PN junction is reverse biased, the breadth of its depletion area increases. Similarly, when a gate junction is reverse biased with respect to FET’s source and drain, its depletion area also increases. Thus, the conduction channel between source and drain confines and drain current decreases. If negative voltages are supplied on the gate, the flow of current between source and drain will cease. Voltages supplied on the gate, due to which flow of current stops, is called pinch-off voltage. During normal operation, the gate is not forward biased.
The N-Channel FET
In figure 5.4, a circuit has been presented in which N channel FET(Field Effect Transistor) (made by means of entering P-type material onto both sides of the block) has been used. On both ends of the N block, S (source) and D (drain) are printed, in a series of which a load RL has been fitted. Parallel to FET(Field Effect Transistor), voltage (VDS) appears (between D & S). In the diagram load current ID has also been shown which passes from the N block channel. Gate is penetrated on both ends of the N block.
As can be seen in diagram 5.5, voltage (VGS) causes negative bias (i.e. grid has been connected with a negative bias voltage), so as long as G is more negative compared to S, no current can pass through the gate.
It has been explained in figure (b) that this particular FET(Field Effect Transistor) conducts on passing about 8 milliamperes current through its N channel when the value of VGSis zero. However, if the value of VGS is modified to -4 volt, ID decreases to 2mA. Variations in Ds have a minute impact on these current quantities. How do these voltages supplied on gate G, control the quantity of current ID passing via R L (without transmission of any current from G). It has been elaborated below
Field-effect transistor controls its channel current through variations in the depletion area inside its N channel located between two P-type materials (fig 5.5). In figure 5.6, it has been elucidated that when a reverse bias is increased, the width of the depletion area increases. In absence of a bias, apart from a number of (+) holes, some (-) electrons are also found. When a very low reverse bias is supplied (figure b) all holes move towards P and all electrons towards N. Thus, a small depletion area forms between P and N, through which currently conducts/passes. When a reverse bias is increased (figure c), electrons flow from N at a very brisk pace towards the positive battery terminal. Electrons emitted from the negative battery terminal combine with holes after entering the P region. Thus, the breadth of the non-conducting region or depletion region expands.
The P-Channel FET
In figure 5.7, the P channel FET circuit and its characteristics have been illustrated. The FET(Field Effect Transistor) is composed of a heavily doped gate which is permeated via both ends of a P material type channel block. According to figure 5.4, both batteries of the FET P channel are reverse biased compared to the FET N circuit. The main current consists of a flow of holes rolling through the P channel. When gate G is made further positive for increasing reverse bias and depletion area, the flow of current diminishes. Through increasing VGS bias further, a point reaches at which the conduction portion (through which current passes) of the channel becomes so narrow that all flows deplete/stops. This value of VGS is called pinch-off voltage. On the contrary, if the value of VGS is changed by more than -5V, the gate conducts due to its forward bias. Thus, all field-effect amplification stops. If gate current is not limited by fitting a resistor, it can damage FET. Maintaining a standard condition, if drain and gate are positive with respect to source and all conventional currents pass through FET(Field Effect Transistor). The relationship which develops between VDS and ID has been described in figure (b)
Comparison between FETs and BJTs
|Field Effect Transistor||Bipolar Junction Transistor|
|1||Its operation depends only on the flow of the majority of carriers (holes and electrons), that’s why it is called a bipolar device.||Its operation depends on the flow of majority and minority carriers (holes and electrons), that’s why it is called a bipolar device.|
|2||They can be fabricated quite easily and they occupy relatively little space. That’s why they are most suited for application in anti-grand circuits.||Its fabrication is somewhat difficult and occupies a larger space compared to FETs. That’s why their vast application in ICs is not preferred|
|3||These are normally less sensitive to temperatures.||These are quite sensitive to temperature|
|4||Its input resistance is quite high (normally 100 megaohm or even higher)||Its output resistance is relatively low|
|5||Its terminals are usually called source, gate, and drain respectively||Its terminals are usually called emitter, base, and collector|
|6||Relatively safer against radiation||Sensitive to radiation|
|7||When used as an amplifier, their voltage gain is less and causes a large distortion in signals||Provide relatively higher voltage gain when used as an amplifier and cause less signal distortion|
|8||Produce low noise when used as an amplifier||Produce large noise. (Remember, in electrical terms, noise means an irregular fluctuation in electrical signals through an electron’s movement in a semiconductor structure. Noise normally happens on unnecessary and repugnant signals on an amplifier’s output, which combines with the desired signal)|
|9||It is a device consisting of three terminals||It is a device comprising three terminals|
|10||Voltages are amplifiers||Current are amplifiers|
|11||When used as a switch or chopper, they are not capable of offset voltage||Provide offset voltages|
|12||Their power rating is low||Their power rating is high|
|13||Its switching speed is low||Its switching speed is high|
Types of Field Effect
There are two types of Field Effect Transistor
1). Junction Field Effect Transistor (JFET)
2). Metal Oxide Semiconductor Field Effect (MOSFET)
Remember, MOSFET is also known as Insulated Gated FET or IGFET. Its further types are as follows.
1). Depletion Enhancement Metal Oxide Semiconductor FET
2). Enhancement only MOSFET or E-only MOSFET
Field Effect transistors of the above-mentioned types can either be N channel devices or P channel devices. All types with symbols can also be reflected as below.
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